Invention Grant
- Patent Title: Static image retiling and power management method and circuit
- Patent Title (中): 静态图像复位和电源管理方法及电路
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Application No.: US12642257Application Date: 2009-12-18
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Publication No.: US09041720B2Publication Date: 2015-05-26
- Inventor: Greg Sadowski , Warren Fritz Kruger , John Wakefield Brothers, III , David I.J. Glen , Stephen David Presant
- Applicant: Greg Sadowski , Warren Fritz Kruger , John Wakefield Brothers, III , David I.J. Glen , Stephen David Presant
- Applicant Address: US CA Sunnyvale CA Markham, Ontario
- Assignee: Advanced Micro Devices, Inc.,ATI Technologies ULC
- Current Assignee: Advanced Micro Devices, Inc.,ATI Technologies ULC
- Current Assignee Address: US CA Sunnyvale CA Markham, Ontario
- Agency: Faegre Baker Daniels LLP
- Main IPC: G09G5/39
- IPC: G09G5/39 ; G06F1/32

Abstract:
A circuit includes memory retiling methods which distribute image information among a plurality of memory channels producing reconfigured image information distributed among a subset of the plurality of memory channels allowing memory channels outside of the subset to be placed into a power save mode to reduce power consumption. Additional methods are disclosed for further reductions in power consumption.
Public/Granted literature
- US20110148923A1 POWER EFFICIENT MEMORY Public/Granted day:2011-06-23
Information query
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