The memory management unit includes a page table correlating respective virtual addresses with corresponding physical addresses, first translation lookaside buffer (TLB) lookup logic that provides one of a first virtual address and a first physical address according to whether a page number of the first virtual address matches a frame number of the first physical address, a first queue buffer that stores and provides the first virtual address, and second TLB lookup logic that determines and provides a first page physical address using the first virtual address to access the page table when the page number of the first virtual address does not match the frame number of the first physical address.