A video channel change system may include one or more processors and a memory. The one or more processors may receive first packets including first video frames associated with a first video channel and second packets including second video frames associated with a second video channel. The one or more processors may decode the first packets and display the first video frames while buffering, in a buffer, the second packets. The one or more processors may determine that a packet of the second packets includes a random access point without decoding the packet, discard the second packets from the buffer that were received prior to the packet, buffer additional second packets received subsequent to the packet, and decode the second packets stored in the buffer and display the second video frames included therein, in response to a request to change from the first video channel to the second video channel.