A semiconductor device includes a first fin-shaped silicon layer on a substrate and a second fin-shaped silicon layer on the substrate, each corresponding to the dimensions of a sidewall pattern around a dummy pattern. A silicide in upper portions of n-type and p-type diffusion layers in the upper portions of the first and second fin-shaped silicon layers. A metal gate line is connected to first and second metal gate electrodes and extends in a direction perpendicular to the first fin-shaped silicon layer and the second fin-shaped silicon layer. A first contact is in direct contact with the n-type diffusion layer in the upper portion of the first pillar-shaped silicon layer, and a second contact is in direct contact with the p-type diffusion layer in the upper portion of the second pillar-shaped silicon layer.