One illustrative method disclosed herein includes forming replacement gate structures for an NMOS transistor and a PMOS transistor by forming gate insulation layers and a first metal layer for the devices from the same materials and selectively forming a metal-silicide material layer only on the first metal layer for the NMOS device but not on the PMOS device. One example of a novel integrated circuit product disclosed herein includes an NMOS device and a PMOS device wherein the gate insulation layers and the first metal layer of the gate structures of the devices are made of the same material, the gate structure of the NMOS device includes a metal silicide material positioned on the first metal layer of the NMOS device, and a second metal layer that is positioned on the metal silicide material for the NMOS device and on the first metal layer for the PMOS device.