Invention Grant
US08990747B2 Logical Verification Apparatus and Method 有权
逻辑验证装置及方法

Logical Verification Apparatus and Method
Abstract:
A verification item extraction apparatus is disclosed that performs a priority determination process. Connection relationships pertinent to input/output are derived for each of logics in a verification subject circuit based on connection information acquired from description data in a storage part. A first priority for verifying the logics is determined based on the connection relationships being derived. Related I/Fs, which are related to inputs to the logics and are interfaces to an outside of the verification subject circuit, are extracted based on the connection information. Second priority for verifying the related I/Fs is determined based on the first priority.
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