A power gate is coupled to a power supply circuit to selectively provide power to a processing core. A switch has a local state and a remote state to alternately route (i) a local sense point on a supply side of the power gate and (ii) and a remote sense point on a load side of the power gate, to a load voltage feedback input of the power supply circuit. Timing logic and driver circuitry control the power gate and the switch in response to a processing core enable signal. Other embodiments are also described.