A method may include receiving, at a first integrated circuit die, a memory transaction having an address from a second integrated circuit die. The method may further include determining, at the first integrated circuit die and based on the address, if the transaction is for the first integrated circuit die and, if so, translating the address. If transaction is for a third integrated circuit die, the transaction may be transmitted, without modification to the address, to the third integrated circuit die. The translation may be based upon a first table with each entry including a first address and a second translated address corresponding to the first address, and a second table with each entry including a first address and an indication if the transaction is to be forwarded without modification to the address.