Invention Grant
US08988950B2 Data loading circuit and semiconductor memory device comprising same 有权
数据加载电路和包含该数据加载电路的半导体存储器件

Data loading circuit and semiconductor memory device comprising same
Abstract:
A data loading circuit comprises a non-volatile memory configured to store non-volatile data and output a serial data signal based on the stored non-volatile data in response to a power-up operation, a deserializer configured to receive the serial data signal and output multiple data bits at intervals of a unit period based on the received serial data signal, a load controller configured to generate multiple loading selection signals that are sequentially activated one-by-one at each interval of the unit period, and a loading memory unit configured to sequentially store the data bits at each interval of the unit period in response to the loading selection signals.
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