Biasing scheme for large format CMOS active pixel sensors
Abstract:
An image sensor includes circuitry compensating for voltage drops in a VSS line. The image sensor includes a plurality of photoreceptors arranged in a pixel array having a number of column lines, and read-out circuitry on the column lines. The read-out circuitry provides substantially equal currents on each column line so as to compensate for voltage drops in the VSS line and provide more accurate pixel signals. The image sensor also includes circuitry for filtering noise from a voltage supply line, and for providing hard and/or soft reset operations.
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