Invention Grant
- Patent Title: Context protection for a column interleaved memory
- Patent Title (中): 列交错存储器的上下文保护
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Application No.: US13948914Application Date: 2013-07-23
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Publication No.: US08971084B2Publication Date: 2015-03-03
- Inventor: Lakshmikantha Holla , Thomas Aton , Steve Prins , Dharaneedharan S
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Frederick J. Telecky, Jr.
- Main IPC: G11C5/02
- IPC: G11C5/02

Abstract:
A semiconductor memory cell includes a set of circuit structures, each having column input/output circuits. The semiconductor memory cell further includes a set of replicas corresponding to the column input/output circuits. The set of replicas are non-functional and fills an empty space next to the column input/output circuits and hence, provides context protection for the column input/output circuits.
Public/Granted literature
- US20150029773A1 CONTEXT PROTECTION FOR A COLUMN INTERLEAVED MEMORY Public/Granted day:2015-01-29
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