Invention Grant
US08970036B2 Stress relieving second level interconnect structures and methods of making the same 有权
应力消除二级互连结构及其制作方法

Stress relieving second level interconnect structures and methods of making the same
Abstract:
Provided is a stress-relieving, second-level interconnect structure that is low-cost and accommodates thermal coefficient of expansion (TCE) mismatch between low-TCE packages and printed circuit boards (PCBs). The interconnect structure comprises at least a first pad, a supporting pillar, and a solder bump, wherein the first pad and supporting pillar are operative to absorb substantially all plastic strain, thereby enhancing compliance between the two electronic components.
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