Invention Grant
- Patent Title: Non-volatile semiconductor memory device and its manufacturing method
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Application No.: US14199864Application Date: 2014-03-06
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Publication No.: US08969942B2Publication Date: 2015-03-03
- Inventor: Toshitake Yaegashi , Kazuhiro Shimizu , Seiichi Aritome
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP9-184863 19970710
- Main IPC: H01L29/788
- IPC: H01L29/788 ; H01L27/105 ; H01L27/115 ; G11C16/04

Abstract:
In a non-volatile semiconductor memory device and a method for manufacturing the device, each memory cell and its select Tr have the same gate insulating film as a Vcc Tr. Further, the gate electrodes of a Vpp Tr and Vcc Tr are realized by the use of a first polysilicon layer. A material such as salicide or a metal, which differs from second polysilicon (which forms a control gate layer), may be provided on the first polysilicon layer. With the above features, a non-volatile semiconductor memory device can be manufactured by reduced steps and be operated at high speed in a reliable manner.
Public/Granted literature
- US20140183617A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE AND ITS MANUFACTURING METHOD Public/Granted day:2014-07-03
Information query
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