Invention Grant
- Patent Title: CMOS circuit for sensor with reduced read noise
- Patent Title (中): 传感器的CMOS电路具有降低的读取噪声
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Application No.: US13524542Application Date: 2012-06-15
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Publication No.: US08969780B2Publication Date: 2015-03-03
- Inventor: Benoit Dupont
- Applicant: Benoit Dupont
- Applicant Address: BE Antwerp BE Schaarbeek
- Assignee: Caeleste CVBA,Benoit Dupont
- Current Assignee: Caeleste CVBA,Benoit Dupont
- Current Assignee Address: BE Antwerp BE Schaarbeek
- Agency: Bacon & Thomas, PLLC
- Main IPC: H01L27/00
- IPC: H01L27/00

Abstract:
A CMOS image sensor having one or more pixels, e.g. in an array, whereby each of the pixels having two or more sub-pixel elements for generating charge according to incident light intensity as well as a common charge sensitive device such as an amplifier coupled to two or more sub-pixel elements of a respective pixel. Charges generated by the two or more sub-pixel elements are added and integrated over respective integration time periods, to provide a signal representing the integrated charges. The circuit can be configured so that the two or more sub-pixel elements have different integration time periods. By combining charges at the charge sensitive device rather than combining outputs of multiple such devices, the amount of read noise can be reduced.
Public/Granted literature
- US20130334399A1 CMOS CIRCUIT FOR SENSOR WITH REDUCED READ NOISE Public/Granted day:2013-12-19
Information query
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