Invention Grant
- Patent Title: Method and system for patterning a mask layer
- Patent Title (中): 图案化掩模层的方法和系统
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Application No.: US11731689Application Date: 2007-03-30
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Publication No.: US08968985B2Publication Date: 2015-03-03
- Inventor: Scott Jong Ho Limb , Eric J. Shrader , Uma Srinivasan
- Applicant: Scott Jong Ho Limb , Eric J. Shrader , Uma Srinivasan
- Applicant Address: US CA Palo Alto
- Assignee: Palo Alto Research Center Incorporated
- Current Assignee: Palo Alto Research Center Incorporated
- Current Assignee Address: US CA Palo Alto
- Agency: Fay Sharpe LLP
- Main IPC: G03F7/20
- IPC: G03F7/20 ; H05K3/00 ; H05K3/28

Abstract:
The presently described embodiments use a printing process, e.g. a wax printing technique, to pattern a mask layer (such as a soldermask layer) of, for example, a printed circuit. Substantially all other conventional processes in developing soldermask and exposure processes can be maintained. According to the presently described embodiments, each printed circuit will have a unique pattern that matches uniform and non-uniform runout. In one form, the pattern is comprised of wax single drops having a specified gap to make the process transparent to the current industry practice. Furthermore, the single drops can be used for both large and small areas without any development time differences. In at least one form, the wax pattern and the soldermask in the gap are removed during development.
Public/Granted literature
- US20080241712A1 Method and system for patterning a mask layer Public/Granted day:2008-10-02
Information query
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