Invention Grant
US08949767B2 Reliability evaluation and system fail warning methods using on chip parametric monitors 有权
使用片上参数监视器的可靠性评估和系统故障预警方法

Reliability evaluation and system fail warning methods using on chip parametric monitors
Abstract:
A method of reliability evaluation and system fail warning using on chip parametric monitors. The method includes determining impact of parametric variation on reliability by identifying key parametric questions to be answered by stress, identifying parametric macros for each parameter, and identifying layout sensitive areas of evaluation. The process can also include a set of parametric macros in one of a test site or a product to be stressed, testing the set of parametric macros prior to start of stress and at each stress read out, and setting life time parameter profile for technology.
Information query
Patent Agency Ranking
0/0