A computer system encompasses a processor (11) including a control unit (111) and an ALU (112) configured to execute arithmetic and logic operations synchronized with the clock signal, and a marching main memory (31), which embraces an array of memory units, configured to store information in each of memory units and to transfer synchronously with the clock signal, providing the processor (11) with the stored information actively and sequentially so that the ALU (112) can execute the arithmetic and logic operations with the stored information. The results of the processing in the ALU (112) are sent out to the marching main memory (31), but there is only one way of instructions flow from the marching main memory (31) to the processor.