Invention Grant
- Patent Title: Low power, hash-content addressable memory architecture
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Application No.: US14330327Application Date: 2014-07-14
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Publication No.: US08949574B2Publication Date: 2015-02-03
- Inventor: Keith R. Slavin
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Dorsey & Whitney LLP
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/10 ; G06F3/06 ; G11C15/00 ; H04L12/54

Abstract:
A method is comprised of inputting a comparand word to a plurality of hash circuits, each hash circuit being responsive to a different portion of the comparand word. The hash circuits output a hash signal which is used to enable or precharge portions of a CAM. The comparand word is also input to the CAM. The CAM compares the comparand word in the precharged portions of the CAM and outputs information responsive to the comparing step. When used to process Internet addresses, the information output may be port information or an index from which port information may be located. A circuit is also disclosed as is a method of initializing the circuit.
Public/Granted literature
- US20140325139A1 LOW POWER, HASH-CONTENT ADDRESSABLE MEMORY ARCHITECTURE Public/Granted day:2014-10-30
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