Invention Grant
US08949500B2 Non-blocking processor bus bridge for network processors or the like
有权
用于网络处理器的非阻塞处理器总线桥等
- Patent Title: Non-blocking processor bus bridge for network processors or the like
- Patent Title (中): 用于网络处理器的非阻塞处理器总线桥等
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Application No.: US13409432Application Date: 2012-03-01
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Publication No.: US08949500B2Publication Date: 2015-02-03
- Inventor: Richard J. Byrne , David S. Masters
- Applicant: Richard J. Byrne , David S. Masters
- Applicant Address: US CA Milpitas
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA Milpitas
- Agency: Smith Risley Tempel Santos LLC
- Agent Daniel J. Santos
- Main IPC: G06F13/36
- IPC: G06F13/36 ; G06F13/362

Abstract:
Described embodiments provide a system having a bridge for connecting two different processor buses. The bridge receives a request from a first bus, the request having an identification field having a value. The request is then entered into one of a plurality of buffers having requests therein with the same identification field values. Which buffer receives the request may be based on a variety of techniques, such as random, least recently used, most full, prioritized, or sequential. Next, the buffered request is transmitted over a second bus. A response to the request is eventually received from the second bus, the response is transmitted over the first bus, and the request is then removed from the buffer. By entering the received request to the buffer with request with the same identification value, there is a reduced possibility of head-of-line request blocking when compared to a single buffer implementation.
Public/Granted literature
- US20130042038A1 NON-BLOCKING PROCESSOR BUS BRIDGE FOR NETWORK PROCESSORS OR THE LIKE Public/Granted day:2013-02-14
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