Invention Grant
- Patent Title: Protection systems for integrated circuits and methods of forming the same
- Patent Title (中): 用于集成电路的保护系统及其形成方法
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Application No.: US13372327Application Date: 2012-02-13
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Publication No.: US08947841B2Publication Date: 2015-02-03
- Inventor: Javier A Salcedo , David J. Clarke , Gavin P. Cosgrave , Yuhong Huang
- Applicant: Javier A Salcedo , David J. Clarke , Gavin P. Cosgrave , Yuhong Huang
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Knobbe, Martens, Olson & Bear, LLP
- Main IPC: H02H9/00
- IPC: H02H9/00 ; H02H3/20 ; H02H9/04 ; H02H3/22

Abstract:
Harsh electrical environments integrated circuit protection for system-level robustness and methods of forming the same are provided. In one embodiment, a protection system includes dual-polarity high blocking voltage primary and secondary protection devices each electrically connected to a pad. The primary protection device has a current handling capability greater than a current handling capability of the secondary protection devices, and the secondary protection device has a turn-on speed that is faster than a turn-on speed of the primary protection device so as to decrease pad voltage overshoot when a fast transient electrical event occurs on the pad. Additionally, the holding voltage of the primary protection device is less than a holding voltage of the secondary protection device such that once the primary protection device has been activated the primary protection device clamps the pad voltage so as to minimize a flow of high current through the secondary protection device.
Public/Granted literature
- US20130208385A1 PROTECTION SYSTEMS FOR INTEGRATED CIRCUITS AND METHODS OF FORMING THE SAME Public/Granted day:2013-08-15
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