Invention Grant
- Patent Title: Memory management among levels of cache in a memory hierarchy
- Patent Title (中): 内存层次结构中缓存级别之间的内存管理
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Application No.: US13778862Application Date: 2013-02-27
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Publication No.: US08843706B2Publication Date: 2014-09-23
- Inventor: Timothy H. Heil , Robert A. Shearer
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Biggers Kennedy Lenart Spraggins, LLP
- Main IPC: G06F12/08
- IPC: G06F12/08 ; G06F12/12

Abstract:
Methods, apparatus, and product for memory management among levels of cache in a memory hierarchy in a computer with a processor operatively coupled through two or more levels of cache to a main random access memory, caches closer to the processor in the hierarchy characterized as higher in the hierarchy, including: identifying a line in a first cache that is preferably retained in the first cache, the first cache backed up by at least one cache lower in the memory hierarchy, the lower cache implementing an LRU-type cache line replacement policy; and updating LRU information for the lower cache to indicate that the line has been recently accessed.
Public/Granted literature
- US20130173863A1 Memory Management Among Levels Of Cache In A Memory Hierarchy Public/Granted day:2013-07-04
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