Invention Grant
US08841759B2 Semiconductor package and manufacturing method thereof 有权
半导体封装及其制造方法

Semiconductor package and manufacturing method thereof
Abstract:
Provided are a semiconductor package and a manufacturing method thereof. A semiconductor package according to an embodiment comprises a chip part on a board, a mold member, and a plated layer on the mold member. The plated layer comprises an electrode pattern connected to a pattern of the board. The electrode pattern of the plated layer can be mounted at least one of at least one a chip part and at least one another semiconductor package.
Public/Granted literature
Information query
Patent Agency Ranking
0/0