Invention Grant
- Patent Title: Semiconductor device comprising a capacitor and an electrical connection via, and fabrication method
- Patent Title (中): 包括电容器和电连接通孔的半导体器件及其制造方法
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Application No.: US13298823Application Date: 2011-11-17
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Publication No.: US08841749B2Publication Date: 2014-09-23
- Inventor: Sylvain Joblot , Alexy Farcy , Jean-Francois Carpentier , Pierre Bar
- Applicant: Sylvain Joblot , Alexy Farcy , Jean-Francois Carpentier , Pierre Bar
- Applicant Address: FR Montrouge FR Crolles
- Assignee: STMicroelectronics SA,STMicroelectronics (Crolles 2) SAS
- Current Assignee: STMicroelectronics SA,STMicroelectronics (Crolles 2) SAS
- Current Assignee Address: FR Montrouge FR Crolles
- Agency: Gardere Wynne Sewell LLP
- Priority: FR1059919 20101130
- Main IPC: H01L21/02
- IPC: H01L21/02 ; H01L23/58 ; H01L49/02 ; H01L23/64 ; H01L23/48 ; H01L21/768 ; H01L23/522

Abstract:
A main blind hole is formed in a front face of a wafer having a rear face. A through capacitor is formed in the main blind hole including a conductive outer electrode, a dielectric intermediate layer, and a filling conductive material forming an inner electrode. Cylindrical portions of the outer electrode, the dielectric intermediate layer and the inner electrode have front ends situated in a plane of the front face of the wafer. A secondary rear hole is formed in the rear face of the wafer to reveal a bottom of the outer electrode. A rear electrical connection is made to contact the bottom of the outer electrode through the secondary rear hole. A through hole via filled with a conductive material is provided adjacent the through capacitor. An electrical connection is made on the rear face between the rear electrical connection and the through hole via.
Public/Granted literature
- US20120133021A1 SEMICONDUCTOR DEVICE COMPRISING A CAPACITOR AND AN ELECTRICAL CONNECTION VIA, AND FABRICATION METHOD Public/Granted day:2012-05-31
Information query
IPC分类: