Invention Grant
US08837222B2 Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate 有权
包括具有包括单晶半导体材料的主体区域和/或其位于衬底中的栅极的至少一部分的选择晶体管的方法和装置

  • Patent Title: Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate
  • Patent Title (中): 包括具有包括单晶半导体材料的主体区域和/或其位于衬底中的栅极的至少一部分的选择晶体管的方法和装置
  • Application No.: US13282237
    Application Date: 2011-10-26
  • Publication No.: US08837222B2
    Publication Date: 2014-09-16
  • Inventor: Toru Tanzawa
  • Applicant: Toru Tanzawa
  • Applicant Address: US ID Boise
  • Assignee: Micron Technology, Inc.
  • Current Assignee: Micron Technology, Inc.
  • Current Assignee Address: US ID Boise
  • Agency: Schwegman Lundberg & Woessner, P.A.
  • Main IPC: G11C16/04
  • IPC: G11C16/04 H01L21/04 H01L27/115
Methods and apparatuses including a select transistor having a body region including monocrystalline semiconductor material and/or at least a portion of its gate located in a substrate
Abstract:
Some embodiments include apparatuses and methods having a memory cell string including memory cells located in different levels of the apparatuses and a select transistor coupled to the memory cell string. In at least one of such apparatuses, the select transistor can include a body region including a monocrystalline semiconductor material. Other embodiments including additional apparatuses and methods are described.
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