Invention Grant
- Patent Title: Improving read stability of a semiconductor memory
- Patent Title (中): 提高半导体存储器的读稳定性
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Application No.: US12929138Application Date: 2011-01-03
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Publication No.: US08830783B2Publication Date: 2014-09-09
- Inventor: Sachin Satish Idgunji , Hemangi Umakant Gajjewar , Vincent Phillipe Schuppe , Yew Keong Chong , Hsin-Yu Chen
- Applicant: Sachin Satish Idgunji , Hemangi Umakant Gajjewar , Vincent Phillipe Schuppe , Yew Keong Chong , Hsin-Yu Chen
- Applicant Address: GB Cambridge
- Assignee: ARM Limited
- Current Assignee: ARM Limited
- Current Assignee Address: GB Cambridge
- Agency: Nixon & Vanderhye P.C.
- Main IPC: G11C8/00
- IPC: G11C8/00 ; G11C11/419 ; G11C11/418 ; G11C11/41 ; G11C11/413 ; G11C8/08 ; G11C7/22 ; G11C8/10 ; G11C8/16 ; G11C11/412

Abstract:
A semiconductor memory storage device is disclosed. The memory comprises a plurality of storage cells for storing data each storage cell comprising an access control device for providing the storage cell with access to or isolation from a data access port in response to an access control signal, access control circuitry for transmitting the access control signal along an access control line to control a plurality of the access control devices connected to the access control line. The access control circuitry responds to a data access request signal by increasing a voltage level supplied to the access control line to a first voltage level at a first average rate and then in response to receipt of a further signal increasing the voltage level supplied to the access control line to the predetermined higher voltage level, in such a way that a further average rate of increase of the voltage level from the first to the predetermined higher voltage level is lower than the first average rate of increase to the first level.
Public/Granted literature
- US20120170390A1 Read stability of a semiconductor memory Public/Granted day:2012-07-05
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