Invention Grant
US08829617B2 Uniform finFET gate height 有权
均匀finFET栅极高度

Uniform finFET gate height
Abstract:
A method including providing a plurality of fins etched from a semiconductor substrate and covered by an oxide layer and a nitride layer, the oxide layer being located between the plurality of fins and the nitride layer, removing a portion of the plurality of fins to form an opening, and forming a dielectric spacer on a sidewall of the opening. The method may also include filling the opening with a fill material, wherein a top surface of the fill material is substantially flush with a top surface of the nitride layer, removing the nitride layer to form a gap between the plurality of fins and the fill material, wherein the fill material has re-entrant geometry extending over the gap, and removing the re-entrant geometry and causing the gap between the plurality of fins and the fill material to widen.
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