Invention Grant
- Patent Title: PMOS threshold voltage control by germanium implantation
- Patent Title (中): 通过锗注入的PMOS阈值电压控制
-
Application No.: US13115428Application Date: 2011-05-25
-
Publication No.: US08828816B2Publication Date: 2014-09-09
- Inventor: Peter Javorka , Stephan Kronholz
- Applicant: Peter Javorka , Stephan Kronholz
- Applicant Address: KY Grand Cayman
- Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee: GLOBALFOUNDRIES Inc.
- Current Assignee Address: KY Grand Cayman
- Agency: Amerson Law Firm, PLLC
- Main IPC: H01L21/336
- IPC: H01L21/336 ; H01L29/66 ; H01L29/778 ; H01L21/8238 ; H01L21/265 ; H01L29/78 ; H01L29/165

Abstract:
Disclosed herein is a method of forming a semiconductor device. In one example, the method comprises forming a P-active region in a silicon containing semiconducting substrate, performing an ion implantation process to implant germanium into the P-active region to form an implanted silicon-germanium region in the P-active region, and forming a gate electrode structure for a PMOS transistor above the implanted silicon-germanium region.
Public/Granted literature
- US20120302023A1 PMOS Threshold Voltage Control by Germanium Implantation Public/Granted day:2012-11-29
Information query
IPC分类: