Invention Grant
- Patent Title: Offset cancellation for DC isolated nodes
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Application No.: US14101015Application Date: 2013-12-09
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Publication No.: US08818271B2Publication Date: 2014-08-26
- Inventor: Justin M. Schauer , Robert David Hopkins, II , Robert J. Drost
- Applicant: Oracle International Corporation
- Applicant Address: US CA Redwood Shores
- Assignee: Oracle International Corporation
- Current Assignee: Oracle International Corporation
- Current Assignee Address: US CA Redwood Shores
- Agency: Park, Vaughan, Fleming & Dowler LLP
- Main IPC: H04B5/00
- IPC: H04B5/00

Abstract:
Offset voltages developed on floating nodes on inputs to high-performance amplifiers that are DC isolated from the data signals input to amplifiers are cancelled by connecting a highly resistive element between the input node and a predetermined potential, particularly useful in proximity communication systems in which two chips are connected through capacitive or inductive coupling circuits formed jointly in the two chips. The resistive element may be an off MOS transistor connected between the node and a desired bias voltage or a MOS transistor with its gate and drain connected to the potential. Multiple bias voltages may be distributed to all receivers and locally selected by a multiplexer for application to one or two input nodes of the receiver. The receiver output can also serve as a predetermined potential when the resistive element has a long time constant compared to the data rate or the resistive element is non-linear.
Public/Granted literature
- US20140099892A1 OFFSET CANCELLATION FOR DC ISOLATED NODES Public/Granted day:2014-04-10
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