Invention Grant
- Patent Title: Non-volatile semiconductor memory device
- Patent Title (中): 非易失性半导体存储器件
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Application No.: US13970659Application Date: 2013-08-20
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Publication No.: US08797801B2Publication Date: 2014-08-05
- Inventor: Hiroshi Maejima , Natsuki Sakaguchi
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-131776 20110614
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/06

Abstract:
In performing a read operation of a memory transistor, a control circuit supplies a first voltage to a selected word line connected to a selected memory transistor. A second voltage is supplied to a non-selected word line connected to a non-selected memory transistor other than the selected memory transistor, the second voltage being higher than the first voltage. A third voltage is supplied to a bit line. A fourth voltage lower than the third voltage is supplied to, among source lines, a selected source line connected to a memory string including the selected memory transistor in a selected memory block. A fifth voltage substantially the same as the third voltage is supplied to, among the source lines, a non-selected source line connected to a non-selected memory string in the selected memory block.
Public/Granted literature
- US20130336062A1 NON-VOLATILE SEMICONDUCTOR MEMORY DEVICE Public/Granted day:2013-12-19
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