Bilayer trench first hardmask structure and process for reduced defectivity

Invention Grant

US08796150B2 Bilayer trench first hardmask structure and process for reduced defectivity 有权

Title translation: 双层沟槽第一硬掩模结构和减少缺陷的过程

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Patent Title: Bilayer trench first hardmask structure and process for reduced defectivity
Patent Title (中): 双层沟槽第一硬掩模结构和减少缺陷的过程
Application No.: US13012166

Application Date: 2011-01-24
Publication No.: US08796150B2

Publication Date: 2014-08-05
Inventor: Hakeem B. S. Akinmade-Yusuff , Samuel Sung Shik Choi , Edward R. Engbrecht , John A. Fitzsimmons
Applicant: Hakeem B. S. Akinmade-Yusuff , Samuel Sung Shik Choi , Edward R. Engbrecht , John A. Fitzsimmons
Applicant Address: US NY Armonk
Assignee: International Business Machines Corporation
Current Assignee: International Business Machines Corporation
Current Assignee Address: US NY Armonk
Agency: Scully, Scott, Murphy & Presser, P.C.
Agent Catherine Ivers
Main IPC: H01L21/311
IPC: H01L21/311 ; H01L21/32 ; H01L29/06

Bilayer trench first hardmask structure and process for reduced defectivity

Abstract:

A method and structure for transferring a lithographic pattern into a substrate includes forming a dielectric hardmask layer over a dielectric substrate. A metal hardmask layer is formed over the dielectric hardmask layer. A protective capping hardmask layer or capping film is formed over the metal hardmask layer, and a lithographic structure for pattern transfer is formed over the capping layer. A pattern is transferred into the dielectric substrate using the defined lithographic structure. The capping hardmask layer can be removed during subsequent processing.

Abstract(Chinese):

用于将光刻图案转印到基板中的方法和结构包括在电介质基底上形成电介质硬掩模层。在介电硬掩模层上形成金属硬掩模层。在金属硬掩模层上形成保护性覆盖硬掩模层或覆盖膜，并且在覆盖层上形成用于图案转印的光刻结构。使用限定的光刻结构将图案转移到电介质基板中。在后续处理过程中，可以移除加盖硬掩模层。

Public/Granted literature

US20120187546A1 BILAYER TRENCH FIRST HARDMASK STRUCTURE AND PROCESS FOR REDUCED DEFECTIVITY Public/Granted day:2012-07-26

Information query

Espacenet

IPC分类:

H	电学
H01	基本电气元件
H01L	半导体器件；其他类目中不包括的电固体器件（使用半导体器件的测量入G01；一般电阻器入H01C；磁体、电感器、变压器入H01F；一般电容器入H01G；电解型器件入H01G9/00；电池组、蓄电池入H01M；波导管、谐振器或波导型线路入H01P；线路连接器、汇流器入H01R；受激发射器件入H01S；机电谐振器入H03H；扬声器、送话器、留声机拾音器或类似的声机电传感器入H04R；一般电光源入H05B；印刷电路、混合电路、电设备的外壳或结构零部件、电气元件的组件的制造入H05K；在具有特殊应用的电路中使用的半导体器件见应用相关的小类）
H01L21/00	专门适用于制造或处理半导体或固体器件或其部件的方法或设备
H01L21/02	.半导体器件或其部件的制造或处理
H01L21/04	..至少具有一个跃变势垒或表面势垒的器件，例如PN结、耗尽层、载体集结层
H01L21/18	...器件有由周期表Ⅳ族元素或含有/不含有杂质的AⅢBⅤ族化合物构成的半导体，如掺杂材料
H01L21/30	....用H01L21/20至H01L21/26各组不包含的方法或设备处理半导体材料的（在半导体材料上制作电极的入H01L21/28）
H01L21/31	.....在半导体材料上形成绝缘层的，例如用于掩膜的或应用光刻技术的（密封层入H01L21/56）；以及这些层的后处理；这些层的材料的选择
H01L21/3105	......后处理
H01L21/311	.......绝缘层的刻蚀