Invention Grant
US08705282B2 Mixed voltage non-volatile memory integrated circuit with power saving
有权
混合电压非易失性存储器集成电路,省电
- Patent Title: Mixed voltage non-volatile memory integrated circuit with power saving
- Patent Title (中): 混合电压非易失性存储器集成电路,省电
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Application No.: US13286969Application Date: 2011-11-01
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Publication No.: US08705282B2Publication Date: 2014-04-22
- Inventor: Hieu Van Tran , Anh Ly , Thuan Vu , Hung Quoc Nguyen
- Applicant: Hieu Van Tran , Anh Ly , Thuan Vu , Hung Quoc Nguyen
- Applicant Address: US CA San Jose
- Assignee: Silicon Storage Technology, Inc.
- Current Assignee: Silicon Storage Technology, Inc.
- Current Assignee Address: US CA San Jose
- Agency: DLA Piper LLP US
- Agent Brent Yamashita
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/04

Abstract:
An integrated circuit die has a first die pad for receiving a first voltage and a second die pad for receiving a second voltage. The second voltage is less than the first voltage. A first circuit which is operable at the first voltage is in the integrated circuit die. A second circuit which is operable at the second voltage is in the integrated circuit die and is connected to the second die pad. A circuit that detects current flow from the second die pad is in the integrated circuit die. A switch is interposed between the first die pad and the first circuit to disconnect the first die pad from the first circuit in response to current flow detected by the circuit for detecting current flow.
Public/Granted literature
- US20130107632A1 Mixed Voltage Non-volatile Memory Integrated Circuit With Power Saving Public/Granted day:2013-05-02
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