Invention Grant
- Patent Title: Processor instructions to accelerate Viterbi decoding
- Patent Title (中): 处理器指令来加速维特比解码
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Application No.: US13517579Application Date: 2012-06-13
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Publication No.: US08694878B2Publication Date: 2014-04-08
- Inventor: Prohor Chowdhury , Alexander Tessarolo
- Applicant: Prohor Chowdhury , Alexander Tessarolo
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent John R. Pessetto; Wade J. Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H03M13/03
- IPC: H03M13/03

Abstract:
Viterbi decoding is performed on a microcontroller by initializing a state-metric array by executing load instructions to load state-metric data from a memory module into a set of registers in the microcontroller. Butterfly processing on the state-metric array is performed by executing Viterbi processing instructions fetched from a program storage module to manipulate the state-metric (SM) data in the set of registers for each Viterbi butterfly in a stage of Viterbi decoding to form a final set of state-metric data and trace bits. After completing each stage, a final set of state-metric data is stored in the memory module by executing store instructions.
Public/Granted literature
- US20120324318A1 Processor Instructions to Accelerate Viterbi Decoding Public/Granted day:2012-12-20
Information query
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