Invention Grant
US08694759B2 Generating predicted branch target address from two entries storing portions of target address based on static/dynamic indicator of branch instruction type
有权
基于分支指令类型的静态/动态指示符，从存储部分目标地址的两个条目生成预测分支目标地址
- Patent Title: Generating predicted branch target address from two entries storing portions of target address based on static/dynamic indicator of branch instruction type
- Patent Title (中): 基于分支指令类型的静态/动态指示符，从存储部分目标地址的两个条目生成预测分支目标地址
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Application No.: US12945732Application Date: 2010-11-12
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Publication No.: US08694759B2Publication Date: 2014-04-08
- Inventor: James D. Dundas , Marvin A. Denman
- Applicant: James D. Dundas , Marvin A. Denman
- Applicant Address: US TX Austin
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US TX Austin
- Agency: Williams Morgan, P.C.
- Main IPC: G06F9/38
- IPC: G06F9/38
Abstract:
A method and apparatus to utilize a branch prediction scheme that limits the expenditure of power and the area consumed caused by branch prediction schemes is provided. The method includes accessing a first entry and a second entry of the data structure, wherein each entry stores a portion of a predicted target address, determining the predicted target address using the portion of the predicted target address stored in the first entry and a portion of a branch address of a fetched branch instruction for a fetched branch instruction of a first type, and determining the predicted target address using the portion of the predicted target address stored in the first entry and the portion of the predicted target address stored in the second entry for a fetched branch instruction of a second type.
Public/Granted literature
- US20120124347A1 BRANCH PREDICTION SCHEME UTILIZING PARTIAL-SIZED TARGETS Public/Granted day:2012-05-17
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