Invention Grant
US08693279B2 Synchronous global controller for enhanced pipelining 有权
用于增强流水线的同步全局控制器

Synchronous global controller for enhanced pipelining
Abstract:
A system includes a memory block and a controller. The controller is adapted to skew a pre-charge signal for a bit line of the memory block. The controller can skew the pre-charge signal during a read operation or a write operation. The system can also include a sense amplifier in communication with a bit line of the memory block, and the sense amplifier can automatically shut off after indicating a sensed data state for the bit line. The controller may be a global controller or a local controller.
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