Invention Grant
- Patent Title: Relaxation oscillator circuit including two clock generator subcircuits having same configuration operating alternately
- Patent Title (中): 松弛振荡器电路包括具有相同配置的两个时钟发生器子电路
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Application No.: US13591340Application Date: 2012-08-22
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Publication No.: US08692623B2Publication Date: 2014-04-08
- Inventor: Seichiro Shiga , Tetsuya Hirose , Yuji Osaki
- Applicant: Seichiro Shiga , Tetsuya Hirose , Yuji Osaki
- Applicant Address: JP Kanagawa
- Assignee: Semiconductor Technology Academic Research Center
- Current Assignee: Semiconductor Technology Academic Research Center
- Current Assignee Address: JP Kanagawa
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2011-185043 20110826
- Main IPC: H03K3/0231
- IPC: H03K3/0231

Abstract:
A control circuit controls first and second clock generator subcircuits so that one subcircuit of the first and second clock generator subcircuits operates for a comparison voltage generating interval, then another subcircuit operates for a clock generating interval, and so that the first and second clock generator subcircuits alternately repeat processes of the comparison voltage generating interval and the clock generating interval. For the comparison voltage generating interval, each of the first and second clock generator subcircuits is controlled to generate a comparison voltage and output the same voltage to an inverted output terminal of a comparator. For the clock generating interval, each of the first and second clock generator subcircuits compares an output voltage from a current-voltage converter circuit with the comparison voltage.
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