Invention Grant
- Patent Title: Digital phase locked loop
- Patent Title (中): 数字锁相环
-
Application No.: US13403358Application Date: 2012-02-23
-
Publication No.: US08692598B2Publication Date: 2014-04-08
- Inventor: Joseph H. Havens
- Applicant: Joseph H. Havens
- Applicant Address: US CA San Jose
- Assignee: LSI Corporation
- Current Assignee: LSI Corporation
- Current Assignee Address: US CA San Jose
- Agency: Ryan, Mason & Lewis, LLP
- Main IPC: H03L7/06
- IPC: H03L7/06

Abstract:
An apparatus comprises digitally controlled oscillator circuitry, feedback circuitry operatively coupled to the digitally controlled oscillator circuitry, and comparison circuitry operatively coupled to the digitally controlled oscillator circuitry and the feedback circuitry. The feedback circuitry, in response to a clock signal generated by the digitally controlled oscillator circuitry, generates a first digital value representing a detected phase of the clock signal for a given clock signal cycle. The comparison circuitry, in response to the first digital value and to a second digital value representing a reference phase, generates a phase error value. The phase error value is useable to generate a first digital control word provided to the digitally controlled oscillator circuitry for controlling a frequency associated with the clock signal. The digitally controlled oscillator circuitry further comprises adjustment circuitry capable of applying a phase adjustment to the clock signal in response to a second digital control word.
Public/Granted literature
- US20130222026A1 DIGITAL PHASE LOCKED LOOP Public/Granted day:2013-08-29
Information query