Invention Grant
- Patent Title: UBM structures for wafer level chip scale packaging
- Patent Title (中): UBM结构用于晶圆级芯片级封装
-
Application No.: US13312538Application Date: 2011-12-06
-
Publication No.: US08692378B2Publication Date: 2014-04-08
- Inventor: Tsung-Yuan Yu , Hsien-Wei Chen , Ying-Ju Chen , Shih-Wei Liang
- Applicant: Tsung-Yuan Yu , Hsien-Wei Chen , Ying-Ju Chen , Shih-Wei Liang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L23/34
- IPC: H01L23/34
Abstract:
A wafer level chip scale semiconductor device comprises a semiconductor die, a first under bump metal structure and a second under bump metal structure. The first under bump metal structure having a first enclosure is formed on a corner region or an edge region of the semiconductor die. A second under bump metal structure having a second enclosure is formed on an inner region of the semiconductor die. The first enclosure is greater than the second enclosure.
Public/Granted literature
- US20130140706A1 UBM Structures for Wafer Level Chip Scale Packaging Public/Granted day:2013-06-06
Information query
IPC分类:
