Invention Grant
- Patent Title: Packaging jig and process for semiconductor packaging
- Patent Title (中): 包装夹具和半导体封装工艺
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Application No.: US13117901Application Date: 2011-05-27
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Publication No.: US08691629B2Publication Date: 2014-04-08
- Inventor: Chi-Ming Huang , Tsung-Ding Wang
- Applicant: Chi-Ming Huang , Tsung-Ding Wang
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/00

Abstract:
An embodiment is a method for semiconductor packaging. The method comprises attaching a chip to a carrier substrate through a first side of a jig, the chip being attached by bumps; applying balls to bond pads on the carrier substrate through a second side of the jig; and simultaneously reflowing the bumps and the balls. According to a further embodiment, a packaging jig comprises a cover, a base, and a connector. The cover has a first window through the cover. The base has a second window through the base. The first window exposes a first surface of a volume intermediate the cover and the base, and the second window exposes a second surface of the volume. The first surface is opposite the volume from the second surface. The connector aligns and couples the cover to the base.
Public/Granted literature
- US20120302008A1 Packaging Jig and Process for Semiconductor Packaging Public/Granted day:2012-11-29
Information query
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