Invention Grant
- Patent Title: Read and write monitoring attributes in transactional memory (TM) systems
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Application No.: US13355302Application Date: 2012-01-20
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Publication No.: US08688917B2Publication Date: 2014-04-01
- Inventor: Gad Sheaffer , Shlomo Raikin , Vadim Bassin , Raanan Sade , Ehud Cohen , Oleg Margulis
- Applicant: Gad Sheaffer , Shlomo Raikin , Vadim Bassin , Raanan Sade , Ehud Cohen , Oleg Margulis
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Blakely, Sokoloff, Taylor & Zafman LLP
- Main IPC: G06F12/08
- IPC: G06F12/08

Abstract:
A method and apparatus for monitoring memory accesses in hardware to support transactional execution is herein described. Attributes are monitor accesses to data items without regard for detection at physical storage structure granularity, but rather ensuring monitoring at least at data items granularity. As an example, attributes are added to state bits of a cache to enable new cache coherency states. Upon a monitored memory access to a data item, which may be selectively determined, coherency states associated with the data item are updated to a monitored state. As a result, invalidating requests to the data item are detected through combination of the request type and the monitored coherency state of the data item.
Public/Granted literature
- US20120117334A1 READ AND WRITE MONITORING ATTRIBUTES IN TRANSACTIONAL MEMORY (TM) SYSTEMS Public/Granted day:2012-05-10
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