Invention Grant
US08687752B2 Method and apparatus for receiver adaptive phase clocked low power serial link
有权
接收机自适应相位时钟低功率串行链路的方法和装置
- Patent Title: Method and apparatus for receiver adaptive phase clocked low power serial link
- Patent Title (中): 接收机自适应相位时钟低功率串行链路的方法和装置
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Application No.: US13286350Application Date: 2011-11-01
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Publication No.: US08687752B2Publication Date: 2014-04-01
- Inventor: Dongmin Park , Jafar Savoj , Beomsup Kim
- Applicant: Dongmin Park , Jafar Savoj , Beomsup Kim
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agent Sam Talpalatsky; Nicholas J. Pauley; Joseph Agusta
- Main IPC: H04L7/00
- IPC: H04L7/00

Abstract:
A serial bit stream having a given bit per second rate is received and distributed to a plurality of phase shifted samplers. A multi-phase sampling trigger is generated at a rate lower than the given bit per second rate, and each of the phase shifted samplers is controlled by one of the phases of the multi-phase sampling trigger. The time spacing between phases of the multi-phase sampling trigger is the inverse of the given bit per second rate. The phase of the multi-phase sampling trigger is aligned with the phase of the serial bit, to collectively recover by the plurality of phase shifted samplers a plurality of consecutive bits from the serial bit stream.
Public/Granted literature
- US20130107987A1 METHOD AND APPARATUS FOR RECEIVER ADAPTIVE PHASE CLOCKED LOW POWER SERIAL LINK Public/Granted day:2013-05-02
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