A method for operating a memory module device. The method can include transferring a chip select, command, and address information from a host memory controller. The host memory controller can be coupled to a memory interface device, which can be coupled to a memory module. The memory module can comprise a plurality of memory devices. The chip select, command and address information can be received at the memory interface using a command-and-address-latency (CAL) mode. Control logic can be used to initiate a power state transition from a first power state to a second power state of an input termination circuit in the memory interface device.