A semiconductor memory device comprises a memory cell; a first bit line and a second bit line connected to the memory cell; and a sense amplifier operative to amplify the voltage between the first and second bit lines. The sense amplifier includes a first and a second drive transistor configuring a transistor pair for differential amplification, and a first and a second capacitor connected between the sources of the first and second drive transistors and a source control terminal, respectively. The sense amplifier precharges the first and second drive transistors on the drain side prior to sensing, thereby holding the threshold information on the first and second drive transistors in the first and second capacitors, and compensates for the source voltages on the first and second drive transistors by the threshold information held in the first and second capacitors at the time of sensing.