A nonvolatile memory device includes a control logic configured to generate an internal command in response to an internal clock, a finite state machine configured to generate a plurality of current state signals in a program pulse and verify pulse setup operation for a program operation and a program verify operation in response to the internal command, after a program operation using a program pulse and a program verify operation using a program verify pulse are completed, and a glue logic configured to generate check control signals for checking a plurality of page buffers of the page buffer unit in response to the plurality of current state signals in the setup operation.