Invention Grant
- Patent Title: Low-current logic plus driver circuit
- Patent Title (中): 低电流逻辑加驱动电路
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Application No.: US13457244Application Date: 2012-04-26
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Publication No.: US08686752B2Publication Date: 2014-04-01
- Inventor: Léon C. M. van den Oever , Erwin Spits
- Applicant: Léon C. M. van den Oever , Erwin Spits
- Applicant Address: DE Munich
- Assignee: EPCOS AG
- Current Assignee: EPCOS AG
- Current Assignee Address: DE Munich
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H03K19/094
- IPC: H03K19/094

Abstract:
A circuit includes a logic stage, an inverter stage, and a driver stage. The logic stage and the inverter stage are provided with current limiters, which include a D-mode feedback transistor and a component that generates a voltage drop. A feedback loop connects the source and the gate of the D-mode feedback transistor via this component. The driver stage includes E-mode transistors connected in a totem pole that drive a D-mode transistor and an E-mode transistor to connect and disconnect the load circuit.
Public/Granted literature
- US20120268166A1 Low-Current Logic Plus Driver Circuit Public/Granted day:2012-10-25
Information query
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