Invention Grant
- Patent Title: Semiconductor device having localized extremely thin silicon on insulator channel region
- Patent Title (中): 半导体器件具有局部极薄的绝缘体上硅沟道区域
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Application No.: US12912897Application Date: 2010-10-27
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Publication No.: US08685847B2Publication Date: 2014-04-01
- Inventor: Amlan Majumdar , Robert J. Miller , Muralidhar Ramachandran
- Applicant: Amlan Majumdar , Robert J. Miller , Muralidhar Ramachandran
- Applicant Address: US NY Armonk US CA Sunnyvale US TX Austin
- Assignee: International Business Machines Corporation,Advanced Micro Devices Corporation,Freescale Semiconductor Corporation
- Current Assignee: International Business Machines Corporation,Advanced Micro Devices Corporation,Freescale Semiconductor Corporation
- Current Assignee Address: US NY Armonk US CA Sunnyvale US TX Austin
- Agency: Cantor Colburn LLP
- Agent Vazken Alexanian
- Main IPC: H01L21/425
- IPC: H01L21/425

Abstract:
A method of forming a transistor device includes forming a dummy gate stack structure over an SOI starting substrate, comprising a bulk layer, a global BOX layer over the bulk layer, and an SOI layer over the global BOX layer. Self-aligned trenches are formed completely through portions of the SOI layer and the global BOX layer at source and drain regions. Silicon is epitaxially regrown in the source and drain regions, with a local BOX layer re-established in the epitaxially regrown silicon, adjacent to the global BOX layer. A top surface of the local BOX layer is below a top surface of the global BOX layer. Embedded source and drain stressors are formed in the source and drain regions, adjacent a channel region. Silicide contacts are formed on the source and drain regions. The dummy gate stack structure is removed, and a final gate stack structure is formed.
Public/Granted literature
- US20120104498A1 Semiconductor device having localized extremely thin silicon on insulator channel region Public/Granted day:2012-05-03
Information query
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