Invention Grant
- Patent Title: Substrate having fullerene thin wires and method for manufacture thereof
- Patent Title (中): 具有富勒烯细线的基板及其制造方法
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Application No.: US12733411Application Date: 2008-08-29
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Publication No.: US08685160B2Publication Date: 2014-04-01
- Inventor: Cha Seung, II , Kunichi Miyazawa , Jedeok Kim
- Applicant: Cha Seung, II , Kunichi Miyazawa , Jedeok Kim
- Applicant Address: JP Ibaraki
- Assignee: National Institute for Materials Science
- Current Assignee: National Institute for Materials Science
- Current Assignee Address: JP Ibaraki
- Agency: Wenderoth, Lind & Ponack, L.L.P.
- Priority: JP2007-221960 20070829
- International Application: PCT/JP2008/065579 WO 20080829
- International Announcement: WO2009/028682 WO 20090305
- Main IPC: C30B7/00
- IPC: C30B7/00 ; C30B7/14 ; C30B29/10 ; B05D1/34 ; B05D5/00
Abstract:
Provided is a fullerene thin wires-attached substrate in which fullerene thin wires are vertically aligned relative to the surface of the substrate and which is applicable to catalysts, column materials, chemical synthesis templates, field emission devices, field effect transistors, photonic crystals, etc.
Public/Granted literature
- US20110008571A1 SUBSTRATE HAVING FULLERENE THIN WIRES AND METHOD FOR MANUFACTURE THEREOF Public/Granted day:2011-01-13
Information query
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