Invention Grant
US08675949B2 Reviewed defect selection processing method, defect review method, reviewed defect selection processing tool, and defect review tool
有权
审查缺陷选择处理方法,缺陷审查方法,审查缺陷选择处理工具和缺陷审查工具
- Patent Title: Reviewed defect selection processing method, defect review method, reviewed defect selection processing tool, and defect review tool
- Patent Title (中): 审查缺陷选择处理方法,缺陷审查方法,审查缺陷选择处理工具和缺陷审查工具
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Application No.: US13266800Application Date: 2010-03-25
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Publication No.: US08675949B2Publication Date: 2014-03-18
- Inventor: Yuji Takagi , Minoru Harada , Yuichi Hamamura
- Applicant: Yuji Takagi , Minoru Harada , Yuichi Hamamura
- Applicant Address: JP Tokyo
- Assignee: Hitachi High-Technologies Corporation
- Current Assignee: Hitachi High-Technologies Corporation
- Current Assignee Address: JP Tokyo
- Agency: Antonelli, Terry, Stout & Kraus, LLP.
- Priority: JP2009-109284 20090428
- International Application: PCT/JP2010/055173 WO 20100325
- International Announcement: WO2010/125877 WO 20101104
- Main IPC: G06K9/00
- IPC: G06K9/00

Abstract:
The present invention relates to semiconductor inspection and provides a technology capable of efficiently detecting a systematic defect. In the present system, with regard to the process (S7, S8) of matching hot spot (HS) points that can be simulated in advance and defect points obtained as a result of a visual inspection each other and the unmatched defect points, a process (S6, S9) of classifying the defect points into groups based on similarity of pattern layout at the defect points to determine the defects belonging to a pattern layout where defects frequently occur, thereby reliably detecting the systematic defect. Also, with a process (S11) of acquiring an uneven distribution in a defect occurrence distribution on a wafer, the systematic defect occurring due to topography of the wafer can also be detected.
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