In one embodiment, a block code decoder is provided. The block code decoder includes a first decoder configured to decode Bose-Chaudhuri-Hochquenghem (“BCH”) coded data packets and a second decoder configured to receive and decode Reed-Solomon (“RS”) encoded data from the first decoder. The first decoder includes a first buffer configured to receive BCH encoded data and one or more BCH decoder circuits coupled to the first buffer. Each BCH decoder circuit decodes a plurality of BCH encoded bits in parallel. A second buffer is arranged to store the decoded BCH data. The second decoder includes a third buffer, arranged to receive the RS encoded data from the first decoder, one or more RS decoder circuits configured to decode a plurality of RS encoded bits in parallel, and a fourth buffer arranged to store RS payload data decoded by the RS decoder circuits.