Invention Grant
- Patent Title: Method and apparatus to adapt the clock rate of a programmable coprocessor for optimal performance and power dissipation
- Patent Title (中): 适应可编程协处理器的时钟速率以优化性能和功耗的方法和装置
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Application No.: US10301372Application Date: 2002-11-21
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Publication No.: US08667252B2Publication Date: 2014-03-04
- Inventor: Osvaldo Colavin , Davide Rizzo
- Applicant: Osvaldo Colavin , Davide Rizzo
- Applicant Address: US TX Coppell
- Assignee: STMicroelectronics, Inc.
- Current Assignee: STMicroelectronics, Inc.
- Current Assignee Address: US TX Coppell
- Agency: Munck Wilson Mandala, LLP
- Main IPC: G06F9/30
- IPC: G06F9/30

Abstract:
Clustered VLIW processing elements, each preferably simple and identical, are coupled by a runtime reconfigurable inter-cluster interconnect to form a coprocessor executing only those portions of a program having high instruction level parallelism. The initial portion of each program segment executed by the coprocessor reconfigures the interconnect, if necessary, or is skipped. Clusters may be directly connected to a subset of neighboring clusters, or indirectly connected to any other cluster, a hierarchy exposed to the programming model and enabling a larger number of clusters to be employed. The coprocessor is idled during remaining portions of the program to reduce power dissipation.
Public/Granted literature
- US20040103263A1 Clustered vliw coprocessor with runtime reconfigurable inter-cluster bus Public/Granted day:2004-05-27
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