A data processing system (10) includes a first master (14) and a second master (16 or 22). The first master includes a cache (28) and snoop queue circuitry (44, 52, 54) having a snoop request queue (44) which stores snoop requests. The snoop queue circuitry receives snoop requests for storage into the snoop request queue and provides snoop requests from the snoop request queue to the cache, and the snoop queue circuitry provides a ready indicator indicating whether the snoop request queue can store more snoop requests. The second master includes outgoing transaction control circuitry (72) which controls initiation of outgoing transactions to a system interconnect. In response to the ready indicator indicating that the snoop request queue cannot store more snoop requests, an initiation hold signal is provided to the outgoing transaction control circuitry to prevent the outgoing transaction control circuitry from initiating any outgoing transactions to the system interconnect (12) within a subset of transaction types.